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Low-Power and Compact CMOS APS Circuits for Hybrid Cryogenic Infrared Fast Imaging

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5 Author(s)
Serra-Graells, F. ; Inst. de Micro-Electron. de Barcelona, Barcelona ; Misischi, B. ; Casanueva, E. ; Mendez, C.
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This brief presents a complete set of CMOS basic building blocks for low-cost scanning infrared (IR) cryogenic imagers. Low-power and compact novel circuits are proposed for single-capacitor integration and correlated double sampling, embedded pixel test, pixel charge-multiplexing and video composition and buffering. In order to validate the new basic building blocks, experimental results are reported in standard 0.35-mum CMOS technology for a 50 mum x 100 mum active pixel cell operating at 77 K. Based on the proposed circuits, IR imagers capable of capturing up to 256 x 2560 pixels at 25 fps can be implemented.

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Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:54 ,  Issue: 12 )