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Extending gate-level diagnosis tools to CMOS intra-gate faults

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4 Author(s)
Fan, X. ; Boston Consulting Group, Shanghai ; Moore, W.R. ; Hora, C. ; Gronthoud, G.

A comprehensive solution to the intra-gate diagnosis problem, including intra-gate bridging and stuck-open faults is provided. The work is based on a local transformation technique that allows transistor-level faults to be diagnosed by the commonly available gate-level fault diagnosis tools without having to deal with the complexity of a transistor-level description of the whole circuit. Three transformations are described: one for stuck-open faults, one for intra-gate resistive-open faults and one for intra-gate bridging faults. Experimental work has been conducted at NXP Semiconductors using the NXP diagnosis tool - FALOC. A number of real diagnosis results from the wafer testing data including both stuck-open faults and intra-gate bridging faults have confirmed the effectiveness of this new method.

Published in:

Computers & Digital Techniques, IET  (Volume:1 ,  Issue: 6 )

Date of Publication:

Nov. 2007

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