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High-performance ion-implanted MES-FET on InP using enhanced barrier self-aligned Schottky gate

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4 Author(s)
Chakrabarti, U.K. ; AT&T Bell Labs., Murray Hill, NJ, USA ; Seabury, C.W. ; Dutta, N.K. ; Vella-Coleiro, G.P.

Summary form only given. An enhanced barrier Schottky diode with a barrier height of 0.78 eV and an ideality factor of 1.04 was fabricated by chemically modifying the surface of InP without the aid of a dielectric layer. This process involves the solution treatment of the InP surface. The presence of ruthenium on the surface was determined by X-ray photoelectron spectroscopy. This process is reproducible and stable with respect to time. The authors discuss results on MIS capacitors fabricated simultaneously with and without this surface treatment.

Published in:

Electron Devices, IEEE Transactions on  (Volume:36 ,  Issue: 11 )

Date of Publication:

Nov 1989

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