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This paper focuses the power-performance issues of running task set with interdependence on chip multiprocessor (CMP) systems. First, we propose a tri-dimensional coding based self-adaptive parallel (TCSP) genetic algorithm allocating the task set on processor cores to minimize the execution time. Next, we present a dynamic voltage scaling (DVS) procedure that alters the operating voltage by exploiting the slack time of tasks. The simulation experimental results demonstrate that our two-stage energy-aware schedule strategy can efficiently schedule the tasks on CMP systems while saving the system energy obviously.