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Demonstration of Low Vt Ni-FUSI N-MOSFETs With SiON Dielectrics by Using a Dy2O3 Cap Layer

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12 Author(s)
Yu, H.Y. ; Interuniv. Microelectron. Center, Leuven ; S.Z.Chang ; Veloso, A. ; Lauwers, A.
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This letter reports a novel approach to achieve low threshold voltage (Vt) Ni-fully-silicide (FUSI) nMOSFETs with SiON dielectrics. By using a dysprosium-oxide (Dy2O3) cap layer with a thickness of 5 Aring on top of the SiON host dielectrics, Vt,lin of 0.18 V for long-channel devices (Lg = 1 mum) using NiSi-FUSI electrode is obtained, satisfying the high-performance device requirements. The Vt modulation due to the Dy2O3 cap layer is also maintained in the short-channel devices (with an Lg,min of 90 nm as demonstrated in this letter). In particular, approximately 150times reduction in gate leakage current is seen while preserving the dielectric capacitance equivalent thickness after adding the Dy2O3 cap layer on SiON dielectrics, likely due to a high-k layer (DySiON) formation during device source/drain activation process. We also report that the Dy2O3 layer does not vitally degrade the device reliability, such as positive-bias temperature instability and time-dependant dielectrics breakdown.

Published in:

Electron Device Letters, IEEE  (Volume:28 ,  Issue: 11 )