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A CMOS Classifier Circuit Using Neural Networks With Novel Architecture

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3 Author(s)
Yildiz, M. ; Dept. of Electron. & Commun. Eng., Dogus Univ., Istanbul, Turkey ; Minaei, S. ; Goknar, I.C.

In this letter, complementary metal-oxide-semiconductor (CMOS) implementation of a neural network (NN) classifier with several output levels and a different architecture is given. The proposed circuit operates in current mode and can classify several types of data. The classifier circuit is designed using a current-voltage converter, an inverter followed by a NOR gate and a voltage-current output stage. Using a 0.35-m TSMC technology parameters, SPICE simulation results for a classifier with two inputs are included to verify the expected results.

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Neural Networks, IEEE Transactions on  (Volume:18 ,  Issue: 6 )