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Bit-Stream Adders and Multipliers for Tri-Level Sigma–Delta Modulators

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3 Author(s)
Chiu-Wa Ng ; Univ. of Hong Kong, Hong Kong ; Ngai Wong ; Tung-Sang Ng

We propose both adder and multiplier circuits for bit-stream signal processing customized for tri-level sigma-delta modulated signals. These architectures are the 2-bit extensions from the existing 1-bit bit-stream adders and multipliers, and are shown to offer better signal-to-noise performance. Field-programmable gate array implementations then confirm their efficacy.

Published in:

Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:54 ,  Issue: 12 )

Date of Publication:

Dec. 2007

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