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Timing measurements such as jitter and skew in the range of picoseconds, for circuits with multigigahertz clocks or multigigabit-per-second serial communication interfaces are common. A Vernier-oscillator-based time-to-digital converter (TDC) is a circuit that allows picosecond-timing measurements by means of two tunable oscillators. In such a circuit, the oscillator jitter, tuning response, start-up transient, and frequency switching transient play an important role in the TDCs measurement time and accuracy. In this work, we discuss the design of an optimized, differential CML-based ring oscillator and its impact on a TDC design. Simulation results from the new oscillator show that the oscillator's short start-up and frequency switching transients have negligible effects on the accuracy of the TDC measurements. TDC simulation results show that, using two of these oscillators, accurate timing measurements in the range of 10 to 900 ps can be achieved with best-case accuracy of ~2 ps.