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Advanced cooling solutions are needed to address the growing challenges posed by future generations of microprocessors. This paper outlines an optimization methodology for electronic system based thermoelectric (TE) cooling. This study stresses that an optimum TE cooling system should keep the electronic device below a critical junction temperature while utilizing the smallest possible heat sink. The methodology considers the electric current and TE geometry that will minimize the junction temperature. A comparison is made between the junction temperature minimization scheme and the more conventional coefficient of performance (COP) maximization scheme. It is found that it is possible to design a TE solution that will both maximize the COP and minimize the junction temperature. Experimental measurements that validate the modeling are also presented.