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In time division synchronous code division multiple access downlink, one computationally efficient receiver for fast time-varying environments is the subblock processing receiver, which utilizes overlap-save fast Fourier transform. In this paper, we first analyze the interferences involved with the subblock processing method proposed by Held and Kerroum and then propose a new subblock processing receiver for fast time-varying channels. The proposed receiver consists of two stages. In the first stage, the entire received chip block is partitioned into overlapping subblocks and they are individually equalized and despread. We then artificially generate the interferences caused by adjacent blocks and the unwanted chip interference within the same subblock and eliminate them from the received data signals. Then, a second subblock processing is performed to detect the transmitted symbols. A practical channel estimator is also introduced to be used with the proposed receiver. Simulation results have shown that the proposed receiver provides a significant performance improvement as compared with the conventional subblock processing method.