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Empirical Analysis of the Dependence of Test Power, Delay, Energy and Fault Coverage on the Architecture of LFSR-Based TPGs

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3 Author(s)
Kamal, M. ; Sharif Univ. of Technol., Tehran ; Koohi, S. ; Hessabi, S.

Power dissipation, energy consumption of CUT and also number of required test vectors for obtaining predetermined fault coverage are the most important criteria used for evaluating the quality of a test pattern generator (TPG). In this paper, we analyze LFSR's flexibility in improving these evaluation criteria for TPG. Usually, we are interested in considering these different criteria simultaneously, while looking for the best configuration. For this purpose, we use genetic algorithm as our optimization algorithm and define some new optimization functions and analyze the capability of LFSR to reduce power, energy and test delay under these functions. From our experimental results on ISCAS'89 and ITC'99, we show that power dissipation of CUT is approximately independent of different optimization functions, and so energy consumption only depends on the number of test vectors. On the other hand, test delay depends on the optimization function, which enforces us to include delay term in the function to avoid test vector increment. Finally, by analyzing energy efficiency values and behavior of energy consumption in terms of fault coverage, under different optimization functions, we show that delay is a suitable optimization function for LFSRs with respect to the number of test vectors, power dissipation, energy consumption and energy efficiency.

Published in:

Defect and Fault-Tolerance in VLSI Systems, 2007. DFT '07. 22nd IEEE International Symposium on

Date of Conference:

26-28 Sept. 2007