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Design Optimization of a 35nm Independently-Double-Gated Flexfet SOI Transistor

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3 Author(s)
R. S. Chintala ; Tennessee Tech University, Cookeville, TN 38505 ; S. Vootkuri ; S. A. Parke

Flexfet is a new SOI IDG-CMOS technology with a damascene metal top gate and an implanted JFET bottom gate that are self-aligned in a gate trench. The independent top and bottom gates are contacted at opposite sides of the channel by a local interconnect that is embedded in the isolation region between devices. A simple analytical dynamic threshold voltage model is developed and verified by extensive device simulation. Optimization of the topgate oxide thickness, silicon thickness, and gate work functions for a 35 nm long NMOSFET is achieved by device simulation. Ideal 1.0V/V dynamic threshold control of this device is achieved.

Published in:

2007 IEEE International SOI Conference

Date of Conference:

1-4 Oct. 2007