Referenced Items are not available for this document.
We have demonstrated NMOS FinFET devices with a Vt of 0.33V through As implantation into TiN. The method allows for multiple Vt FinFET devices with Vt's of 0.33V, 0.55V (NMOS) and -0.35V (PMOS) through just one As implantation step into lOnm TiN. The NMOS Vt can be further modulated by adjusting the As implantation dose. Further optimization of the cap, implantation and annealing conditions will be needed to keep the implantation damage away from the gate dielectric.
Published in:
SOI Conference, 2007 IEEE International
Date of Conference: 1-4 Oct. 2007
- Page(s):
- 31 - 32
- ISSN :
- 1078-621X
- E-ISBN :
- 978-1-4244-0880-1
- Print ISBN:
- 978-1-4244-0880-1
- INSPEC Accession Number:
- 9715147
- Conference Location :
- Indian Wells, CA
- Digital Object Identifier :
- 10.1109/SOI.2007.4357838
- Product Type:
- Conference Publications
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