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Adaptive sensing and image processing with a general-purpose pixel-parallel sensor/processor array integrated circuit

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1 Author(s)
Dudek, P. ; Univ. of Manchester, Manchester

In this paper, a pixel-parallel image sensor/processor architecture with a fine-grain massively parallel SIMD analogue processor array is overviewed and the latest VLSI implementation, SCAMPS vision chip, comprising 128 times 128 array, fabricated in a 0.35mum CMOS technology, is presented. Examples of real-time image-processing executed on the chip are shown. Sensor-level data reduction, wide dynamic range and adaptive sensing algorithms, enabled by the sensor-processor integration, are discussed.

Published in:

Computer Architecture for Machine Perception and Sensing, 2006. CAMP 2006. International Workshop on

Date of Conference:

18-20 Aug. 2006