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A 6-bit 3.5-GS/s flash ADC is fabricated in a 90nm CMOS process. A clamp diode with a replica biasing and an acceleration capacitor are introduced for high-speed overdrive recovery. Averaging network is analyzed to explore the effect of tail current mismatch. The 3.5-GS/s ADC consumes 98mW with 0.9V power supply. Its SNDR is 31.18dB with Nyquist frequency input.
VLSI Circuits, 2007 IEEE Symposium on
Date of Conference: 14-16 June 2007