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Performance and Variability Optimization Strategies in a Sub-200mV, 3.5pJ/inst, 11nW Subthreshold Processor

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12 Author(s)
Scott Hanson ; University of Michigan, Ann Arbor, MI ; Bo Zhai ; Mingoo Seok ; Brian Cline
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A robust, energy efficient subthreshold (sub-Vth) processor has been designed and tested in a 0.13 mum technology. The processor consumes 11 nW at Vdd = 160 mV and 3.5 pJ/inst at Vdd = 350 mV. Variability and performance optimization techniques are investigated for sub-Vth circuits.

Published in:

2007 IEEE Symposium on VLSI Circuits

Date of Conference:

14-16 June 2007