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Integrated designs in deep-submicron CMOS require ESD protection for their I/O pins. Since CMOS scaling drastically lowers the breakdown voltage of a MOS transistor, the available design window for ESD protection is narrowing. An inductor-based ESD protection offers superb protection but is severely area consuming. In this paper we propose a transformer-based ESD protection for inductor-based LNAs. We demonstrate that the proposed technique offers excellent ESD protection and RF performance without the loss of area.