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Upset Characterization and Test Methodology of the PowerPC405 Hard-Core Processor Embedded in Xilinx Field Programmable Gate Arrays

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3 Author(s)
Allen, G.R. ; California Inst. of Technol., Pasadena ; Swift, G.M. ; Miller, G.

Pseudo-static upset results for memory elements in the PPC405 core embedded in a 1.5 V, 130 nm Virtex-II Pro FPGA are compared to the PPC405 core embedded in a 1.2 V, 90 nm Virtex-4 FX FPGA. The results show consistency with earlier PowerPC processor measurements and illuminate scaling trends. While details vary, the upsetable elements consistently yield very low thresholds (below LET= 2 MeV/mg/cm2 for heavy ions and 10 MeV for protons), but also small per bit limiting cross sections (below 10-7 cm2 for heavy ions and 10-14 cm2 for protons) and, therefore, moderate upset rates in space radiation environments.

Published in:

Radiation Effects Data Workshop, 2007 IEEE  (Volume:0 )

Date of Conference:

23-27 July 2007