By Topic

Effective full-duplex Mesochronous Link Architecture for Network-on-Chip Data-Link layer

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Mangano, D. ; IP&D - On Chip Commun. Syst. (OCCS), STMicroelectronics, Geneva, Switzerland ; Falconeri, G. ; Pistritto, C. ; Scandurra, A.

The increasing complexity of system on chip (SoC) architectures and the physical issues due to the CMOS technology scaling, led to explore new solutions to build effective on-chip interconnection and communication infrastructures. Network on chip (NoC) paradigm has been proposed as architectural solution mainly for overcoming scalability and flexibility limitations. However, advanced techniques to mitigate wire-delay effects have to be employed to reduce the impact of physical issues. Globally asynchronous locally synchronous (GALS) paradigm has been selected to this purpose as solution to implement the NoC physical layer, and many different approaches to design GALS-based NoC can be used. In this paper a full-duplex mesochronous link architecture, for which a patent has been submitted, is proposed to effectively implement the GALS paradigm in the STNoCtrade system. Such a link, exploiting the service provided by the newest mesochronous physical layer known as SKIL, effectively implements the mesochronous communication at data-link layer and enables to overcome some important issues of the previous mesochronous solutions.

Published in:

Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on

Date of Conference:

29-31 Aug. 2007