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Stress Engineering for High-k FETs: Mobility and Ion Enhancements by Optimized Stress

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3 Author(s)
Masumi Saitoh ; Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, 8 Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan, Tel: +81-45-770-3273, Fax: +81-45-770-3286, E-mail: masumi.saitoh@toshiba.co.jp ; Shigeki Kobayashi ; Ken Uchida

In this paper, we present the first systematic study of uniaxial/ biaxial stress effects on mobility (mu) and Ion enhancements in high-k n/pFETs. It is demonstrated for the first time that mu enhancement of high-k nFETs by biaxial strain is greater than that of SiO2 nFETs in high Eeff, resulting in the better Ion improvement of high-k nFETs than SiO2 nFETs particularly in shorter-channel regime. It is also shown that mu enhancement of high-k pFETs by strain is comparable to that of SiO2 pFETs. The optimum stress design for high-mu high-k n/pFETs is also discussed and it is concluded that the application of transverse tensile stress is crucial for improved n/pFETs.

Published in:

2007 IEEE Symposium on VLSI Technology

Date of Conference:

12-14 June 2007