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High-performance high-κ/metal gates for 45nm CMOS and beyond with gate-first processing

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37 Author(s)
Chudzik, M. ; IBM Semicond. Res. & Dev. Center, Hopewell ; Doris, B. ; Mo, R. ; Sleight, J.
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Gate-first integration of band-edge (BE) high-κ/metal gate nFET devices with dual stress liners and silicon-on-insulator substrates for the 45nm node and beyond is presented. We show the first reported demonstration of improved short channel control with high-κ/metal gates (HK/MG) enabled by the thinnest Tinv (≪12Å) for BE nFET devices to-date, consistent with simulations showing the need for ≪14Å Tinv at Lgate≪35nm. We report the highest BE HK/MG nFET Idsat values at 1.0V operation. We also show for the first time BE high-κ/metal gate pFET's fabricated with gate-first high thermal budget processing with thin Tinv (≪13Å) and low Vts appropriate for pFET devices. The reliability in these devices was found to be consistent with technology requirements. Integration of high-κ/metal gate nFET's into CMOS devices yielded large SRAM arrays.

Published in:

VLSI Technology, 2007 IEEE Symposium on

Date of Conference:

12-14 June 2007

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