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Globally Asynchronous, Locally Synchronous Circuits: Overview and Outlook

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4 Author(s)
Krstic, M. ; IHP Microelectron., Frankfurt ; Grass, E. ; Gurkaynak, F.K. ; Vivet, P.

This article provides a pragmatic survey on the state of the art in GALS architectural techniques, design flows, and applications. The authors also prescribe several industrial inventions and changes in methodology, tools, and design flow that would improve GALS-based integration of IP blocks.

Published in:

Design & Test of Computers, IEEE  (Volume:24 ,  Issue: 5 )

Date of Publication:

Sept.-Oct. 2007

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