By Topic

RSTM : A Relaxed Consistency Software Transactional Memory for Multicores

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Jaswanth Sreeram ; Georgia Institute of Technology, USA ; Romain Cledat ; Tushar Kumar ; Santosh Pande

Software transactional memory (STM) systems have been proposed in order to make parallel programs easier to develop and verify compared to conventional lock-based programming techniques. However, conventional STMs do not scale in performance to a large number of concurrent threads for several classes of applications. While the atomicity semantics of traditional STMs greatly simplify the correct sharing of data between threads, these same atomicity semantics incur a large penalty in program execution time.we propose a relaxed software transactional memory (RSTM) model that allows the programmer to specify atomicity constraints for transactions with greater flexibility and precision. In a RSTM system, shared data accessed by a transaction is classified into several "consistency groups". A single consistency policy is enforced on each consistency group. Both membership of a group and the policy to be applied are declaratively specified by the programmer.

Published in:

16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007)

Date of Conference:

15-19 Sept. 2007