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Transient Radiation Response of Hardened CMOS/SOS Microprocessor and Memory Devices

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3 Author(s)
Brucker, G.J. ; RCA Laboratory, Princeton, NJ ; Measel, P. ; Wahlin, K.

Transient tests on rad-hard microprocessor and memory devices of CMOS/SOS design were carried out with the Boeing Linac as the electron pulse source of 40 ns duration. Mean temporary and permanent upset levels were determined to be 1.1×1010 and 1.3×1010 rads (Si)/s for the microprocessor, and 1.3×1010 and 5.1×1010 rads (Si)/s for the memory, respectively. All of these values correspond to the worst case exposure conditions which were found to be static rather than dynamic (i.e., a transition state). Storage pattern sensitivity for both device types during exposure was also determined to be a dominant-zero pattern, that is, a few ones in a field of zeroes in the case of the microprocessor, and a single one in a field of zeroes for the memory. Transient annealing measurements on the microprocessor indicated a recovery time of 20 ¿s to 87% of VOH following a 27 kilorad dose/pulse for a 1.8 ¿s electron pulse.

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Nuclear Science, IEEE Transactions on  (Volume:27 ,  Issue: 6 )