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Transient responses of GaAs E-JFET planar integrated circuits caused by a 25 ns wide ionizing radiation pulse from a LINAC were measured. Present technology circuits with 2.5 Â¿m channel length devices have a measured logic upset level of about 1 Ã 1010 rad(GaAs)/s and a survival dose rate of approximately 1 Ã 1011 rad(GaAs)/s. A theoretical analysis for logic upset dose rate and a correlation of experimental results with theory is presented. For E-JFET devices with a channel length of 1 Â¿m, a logic upset dose rate of 1 Ã 1011 rad(GaAs)/s is predicted.