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A Radiation-Hardened I2L 8 × 8 Multiplier Circuit

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4 Author(s)
B. R. Doyle ; Harris Semiconductor Melbourne, Florida 32901 ; S. A. Kreps ; N. W. Van Vonno ; G. W. Lake

Development of improved Substrate Fed I2L (SFL) processing has been combined with geometry and fanout constraints to design a radiation hardened LSI 8 × 8 Multiplier. This paper will describe details of the process and circuit design and give resultant electrical and radiation test performance.

Published in:

IEEE Transactions on Nuclear Science  (Volume:26 ,  Issue: 6 )