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A CAMAC module is described with self-contained hardware to test most aspects of CAMAC-based data acquisition systems. There is a 1 Hz - 5 MHz pulse generator and a simulator for an accelerator beam spill; these are ANDed with an optional inhibit signal input to produce an "event-present" output for generating a computer interrupt. The interrupt may be generated in either non-CAMAC hardware, or in standard LAM logic within the module. There is also a register which may be repeatedly written or read (to simulate data) in response to the interrupt, and, for measuring performance, there are two visual readout scalers with front-panel controls.