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Room Temperature Annealing of Ionizatton-Induced Damage in CMOS Circuits

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2 Author(s)
D. H. Habing ; Sandia Laboratories, Albuquerque, New Mexico 87115 ; B. D. Shafer

The effects of ionization on MOS devices as a function of time after exposure to a radiation source are functions of the radiation source and device bias time profiles. This paper presents a discussion, supported by a comprehensive series of experiments, of the time dependence of ionization-induced damage to complementary metal oxide semiconductor (CMOS) devices. Two distinct annealing or recovery mechanisms were investigated: (1) room temperature annealing in the absence of radiation, and (2) radiation enhanced room temperature annealing. Experiments were performed using both electron aid ¿-ray sources with ionization rates ranging from 103 rads(Si)/sec to greater than 1011 rads(Si)/sec and observation times extending from 1 msec to 105 seconds. The experiments demonstrate that ionization-induced damage to positively biased MOS devices, such as the n-channel devices in CMOS circuits, can be annealed appreciably at room temperature by additional irradiation of the device with zero gate bias. Thus, when operation of CMOS circuitry during or immediately following radiation exposure is of interest, the experimental semipermanent-type radiation damage data typically reported must be carefully evaluated.

Published in:

IEEE Transactions on Nuclear Science  (Volume:20 ,  Issue: 6 )