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Prevalent Error Sources in Transistor Delay-Time Measurements

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1 Author(s)
Sawyer, David E. ; Institute for Applied Technology National Bureau of Standards Washington, D. C. 20234

Measurements of bipolar transistor delay times are extensively employed to predict neutron vulnerability. Of the various possible delay times, phase delay is most commonly measured. Although this is the simplest delay measurement to implement, the measurement circuit may be quite susceptible to extraneous signal coupling at the measurement frequency and this can cause the accuracy to be severely degraded. A technique for minimizing this delay-time error has been developed. It employs simple, preferably non-reactive, but at least known, networks in place of the transistor. From the differences between the "delay times" measured on these known networks, the location and magnitude of the error sources in the circuit are found. This allows one to reduce greatly the effects of the error sources on all subsequent measurements. To confirm the theory of the error-correcting technique, RC networks with known delay times were assembled on transistor headers. For a particular bridge configuration, the uncorrected delay times measured were quite frequency dependent, but this dependence was removed by adding a correction term to the delay times. The correction term is obtained from measurements on the non-reactive networks and does not at all depend on the measured RC network delay times. The effects of error-sources are particularly severe when transistors with low or moderate hfe values are measured, as when measurements are made on transistors that have been degraded by subjecting them to neutron radiation.

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Nuclear Science, IEEE Transactions on  (Volume:19 ,  Issue: 6 )