By Topic

A Simple Design Algorithm for Synthesis of Multilevel Combinational Networks

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)

An algorithm is presented for the synthesis of combinational networks with a constrained arrangement of ANDs, ORs, NANDs, NORs, and inverters. The algorithn is easily presented to students in an introductory logic design course and has considerable application in modem practical logic design. Many texts available for a first course in logic design give very limited practical guidance for synthesis of networks under constraints outlined here. It is suggested that the algorithm presented here be furnished as supplementary material in the introductory course.

Published in:

Education, IEEE Transactions on  (Volume:11 ,  Issue: 2 )