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In this paper we describe a low-voltage (~1 kV) short-channel 4H-SiC power DMOSFET with several structural modifications to reduce the specific on-resistance. These include the following: 1) a heavily doped n-type current-spreading layer beneath the p-base; 2) a heavily-doped JFET region with narrow ( ~1 mum) JFET width; 3) a ldquosegmentedrdquo base contact layout; and 4) tighter alignment tolerances to reduce cell pitch. The design is optimized using computer simulations, and the resulting devices are fabricated and characterized. The fabricated device exhibits a specific on-resistance of 6.95 mOmega-cm2, which is one of the lowest yet reported on-resistances for a power MOSFET in this voltage range.
Date of Publication: Oct. 2007