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An 8-bit successive approximation (SA) analog-to- digital converter (ADC) in 0.18 mum CMOS dedicated for energy-limited applications is presented. The SA ADC achieves a wide effective resolution bandwidth (ERBW) by applying only one bootstrapped switch, thereby preserving the desired low power characteristic. Measurement results show that at a supply voltage of 0.9 V and an output rate of 200 kS/s, the SA ADC performs a peak signal-to-noise-and-distortion ratio of 47.4 dB and an ERBW up to its Nyquist bandwidth (100 kHz). It consumes 2.47 muW in the test, corresponding to a figure of merit of 65 f J/conversion-step.
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:42
,
Issue:
10
)
Date of Publication: Oct. 2007
- Page(s):
- 2161 - 2168
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 9633471
- Digital Object Identifier :
- 10.1109/JSSC.2007.905237
- Date of Current Version :
- 24 September 2007
- Issue Date :
- Oct. 2007
- Sponsored by :
- IEEE Solid-State Circuits Society
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