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A Fault-Detection System for Digital Integrated Circuits

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5 Author(s)

A system has been developed for the detection of most commonly occurring faults in digital IC's. Such faults consist of either permanent ("stuck-at") logic levels at input or output terminals, or short-circuits between adjacent terminals in a microcircuit. In the test system to be described both input and output terminals are simultaneously analyzed under quasi-optimum test patterns. The input and output test patterns for each circuit of interest are stored in an average of 330 bits of READ-ONLY memory. The present system is capable of testing the logic operation of CMOS and all families of TTL circuits.

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Instrumentation and Measurement, IEEE Transactions on  (Volume:26 ,  Issue: 3 )