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To decrease the computational complexity of computer vision algorithms, one of the solutions is to achieve some low-level image processing on the sensor focal plan. It becomes a smart sensor device called a retina. This concept makes the vision systems more compact. It increases performances thanks to the reduction of data flow exchanges with external circuits. This paper presents a comparison relating two different vision system architectures. The first one implements a logarithmic complimentary metal-oxide-semiconductor (CMOS)/active pixel sensor interfaced to a microprocessor, where all computations are carried out. The second involves a CMOS sensor including analog processors allowing on-chip image processing. An external microprocessor is used to control the on-chip data flow and integrated operators. We have designed two vision systems as proof-of-concept. The comparison is related to image processing computation time, processing reliability, programmability, precision, bandwidth, and subsequent stages of computations.