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Energy efficient novel architectures for the lifting-based discrete wavelet transform

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3 Author(s)
Varshney, H. ; Aligarh Muslim Univ., Aligarh ; Hasan, M. ; Jain, S.

Energy efficient single-processor and fully pipelined architectures for the lifting-based JPEG2000's 5/3 two-dimensional (2D)-discrete wavelet transform are presented. The single processor performs both the row-and column-wise processing simultaneously, that is, full 2D transform with 100% hardware utilisation. In addition, the architecture uses minimum embedded memory. The fully pipelined architecture is obtained by replicating the single-processor block depending on the levels of decomposition with much lower memory requirement and higher throughput than the single processor involved in multi-level transforms. These architectures can be directly used in real-time image/video consumer applications to extend the battery life of portable systems.

Published in:

Image Processing, IET  (Volume:1 ,  Issue: 3 )