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Extended Fault Detection Techniques for Systems-on-Chip

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3 Author(s)
P. Bernardi ; Politecnico di Torino, Dipartimento di Automatica e Informatica Torino, Italy ; L. Bolzani ; M. Sonza Reorda

The adoption of systems-on-chip (SoCs) in different types of applications represents an attracting solution. However, the high integration level of SoCs increases the sensitivity to transient faults and consequently introduces some reliability concerns. Several solutions have been proposed to attack this issue, mainly intended to face faults in the processor or in the memory. In this paper, we propose a solution to detect transient faults affecting data transmitted between the microprocessor and the communication peripherals embedded in a SoC. This solution combines some modifications of the source code at high level with the introduction of an Infrastructure IP (I-IP) to increase the dependability of the SoC.

Published in:

2007 IEEE Design and Diagnostics of Electronic Circuits and Systems

Date of Conference:

11-13 April 2007