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Wafer-Level Integration Technique of Surface Mount Devices on a Si-Wafer With Vibration Energy and Gravity Force

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4 Author(s)
Minoru Sudou ; Toyohashi Univ. of Technol., Toyohashi ; Hidekuni Takao ; Kazuaki Sawada ; Makoto Ishida

This paper reports about a novel wafer-level integration technique of discrete surface mount devices (SMDs). It enables wafer-level mounting of plural kinds of SMDs on a silicon (Si)-wafer using vibration and gravity force. Deep holes with 400-m depth are formed on the surface of a Si-wafer by deep reactive ion etching process after general integrated circuit process for positioning of SMDs. A non-conductive adhesive (CYTOP) are coated on the deep holes and it is used to fix the aligned SMDs. SMDs are distributed on a Si-wafer mounted on vibration generator, and then a vibration is applied. The SMDs migrate due to the reduced friction between the wafer surface, and they drop into the holes on the silicon wafer. The size of the holes has an appropriate clearance to the size of SMD. In order to align two or more kinds of SMDs, sizes of the deep holes on a Si-wafer are adjusted to the size of each SMD. SMDs with the largest size are dropped into the holes first, and then the secondary large SMDs are dropped into the holes with the corresponding size. SMDs are finally connected electrically by wire bonding at the final step. In the experiment, two different sizes of SMD were successfully mounted into all the holes on a Si-wafer automatically. This technology will be a wafer-level process technology which is very promising to integrate two or more kinds of discrete elements.

Published in:

IEEE Transactions on Components and Packaging Technologies  (Volume:30 ,  Issue: 3 )