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HfSiOx with TiN gate is investigated under substrate injection with respect to stress-induced leakage current (SILC). Most damage caused by electrical stress was found in the high- layer and not in the interface to silicon. Dependent on the application, SILC can exhibit several levels of severity. In pure logic circuits, a large area approximation is sufficient. However, for memory applications, the current increase in small area is important as well. Both contributions are investigated, revealing no lifetime-limiting current increase. With an improved deposition process, SILC can even be suppressed.