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Three-dimensional architecture appears today to be essential for the next high-density metal-insulator-metal (MIM) capacitor generation. Thus, the classical physical vapor deposition method usually used for the electrode deposition must be replaced by more conformal deposition methods, like chemical vapor deposition (CVD) method. In this paper, trapping phenomenon of MIM capacitors using CVD-TiN for electrodes and atomic layer deposition Al2O3 for insulator is studied, when integrated in planar and in 3-D MIM devices. In particular, we demonstrate the correlation between the plasma post-treatment (PT) applied to the CVD-TiN layer to ensure its low resistivity and the charge trapping in the alumina. Moreover, while applying the Di Maria method to those MIM structures, we demonstrate that charges trapped are electrons, which are located near the metal/insulator interfaces. Based on previous paper, an explanation of the origin of this trapping phenomenon is also proposed. Finally, we demonstrate that the plasma PT does not penetrate correctly into the trenches, suggesting that CVD method for the TiN electrode deposition is not suitable for high-aspect-ratio 3-D devices.