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The influence of metal interconnect resistance becomes increasingly critical as the power IC technology continues to advance. In this paper, we report a multilayer quasi-3D finite element analysis (FEA) approach to model the influence of metal interconnect resistance of power IC's. We have used this FEA tool to analyze and optimize a large number of metal interconnect designs. Three case studies will be reported in this paper: 1) optimization of single-layer metal interconnect design; 2) analysis of two-layer metal interconnect design, and 3) novel three-layer metal interconnect designs. The modeling results are compared to measured device data for model validation. Reasonable agreement was observed. Design guidelines were generated based on the modeling results.