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Order Reduction by Explicit Moment Matching Based on State Variable Approach

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2 Author(s)
Dumitriu, L. ; "Politehnica" Univ. of Bucharest, Bucharest ; Iordache, M.

The paper presents a sistematic procedure for order reduction needed in an efficient analog large-scale circuit simulation. The procedure uses a reduced number of the original circuit moments to obtain an accurate approximation of the circuit function corresponding to an equivalent reduced-size circuit. An efficient program for state equation formulation and transfer function generation allow the computation of the original circuit moments. Some examples are done to illustrate the method.

Published in:

Signals, Circuits and Systems, 2007. ISSCS 2007. International Symposium on  (Volume:2 )

Date of Conference:

13-14 July 2007

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