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Bit-multiplicity of neutron-induced single event upsets (SEU) in CMOS SRAMs formed with 130 and 180 nm technologies was analyzed using mono-energetic, quasi-mono-energetic, and spallation neutron sources in various accelerator facilities. The energy dependence of the ratio of multi-cell upsets (MCUs) to the total number of upsets can be described by a Weibull-type function with the threshold energy of the MCU. The 130 nm SRAMs show a novel feature of multi-cell upsets (MCUs) including frequency distribution of the multiplicity of error bits. In the case of the 130 nm SRAM, the probability function of the MCU can be expressed as a sum of exponential and Lorentzian functions of the multiplicity of error bits. According to previous results of 3-dimensional device simulation, the Lorentzian component can be due to bipolar action.