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High-Accuracy Data Acquisition Architectures for Ultrasonic Imaging

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4 Author(s)
Alexander N. Kalashnikov ; Sch. of Electr. & Electron. Eng., Nottingham Univ., Nottingham ; Vladimir G. Ivchenko ; Richard E. Challis ; Barrie R. Hayes-Gill

This paper proposes a novel architecture for a data acquisition system intended to support the next generation of ultrasonic imaging instruments operating at or above 100 MHz. Existing systems have relatively poor signal-to-noise ratios and are limited in terms of their maximum data sampling rate, both of which are improved by a combination of embedded averaging and embedded interleaved sampling. "On-the-fly" pipelined operation minimizes control overheads for signal averaging. A two-clock sampling timing system provides for effective sampling rates that are a factor of 20 or more above the basic sampling rate of the analog-to-digital converter (ADC). The system uses commercial field-programmable gate array devices operated at clock frequencies commensurable with the ADC clock. Implementation is via the Xilinx Xtreme digital signal processing development kit, available at low cost. Sample rates of up to 2160 MHz have been achieved in combination with up to 16384 coherent averages using the above-mentioned off-the-shelf hardware.

Published in:

IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control  (Volume:54 ,  Issue: 8 )