By Topic

A Novel Voltage Scaling Algorithm through Ant Colony Optimization for Embedded Distributed Systems

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Dan Ding ; Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China; Graduate University of Chinese Academy of Sciences, Beijing, China. ; Lisheng Zhang ; Zheng Wei

Dynamic voltage scaling, supported by many DVS-enabled processors, is an efficient technique for energy-efficient embedded systems. Many researchers work on DVS and have presented various DVS algorithms, some with quite good results. However, the previous algorithms either have a large time complexity or obtain results sensitive to the count of the voltage modes. Fine-grained voltage modes lead to optimal results, but coarse-grained voltage modes cause less optimal one. This paper presents a new algorithm based on ant colony optimization, called ant colony optimization voltage and task scheduling (ACO-VTS) with a low time complexity implemented by parallelizing and its linear time approximation algorithm. Both of them generate quite good results, saving up to 30% more energy than one of the previous ones under coarse-grained modes, but their results don't depend on the number of modes available.

Published in:

Integration Technology, 2007. ICIT '07. IEEE International Conference on

Date of Conference:

20-24 March 2007