By Topic

System-on-Chip Circuit Architecture for Eliminating Interferents in Surface Plasmon Resonance Sensing Systems

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Johnston, M.M.W. ; Intel Massachusetts, Inc., Hudson ; Hansen, L.E. ; Wilson, D.M. ; Booksh, Karl S.

This paper presents a system-on-chip circuit architecture that enables the extraction of concentration information directly from a surface plasmon resonance (SPR) probe, independent of ambient fluctuations in the reference medium, temperature, and background light. Compensation for these baseline (bulk) interferences is embedded into the baseline integration state of the photodetectors in the optical path, creating a ldquoflat linerdquo for the baseline [no analyte present/bulk refractive index (RI)] condition and the characteristic SPR dips for the measurement (analyte present) condition. A resolution of 2 times 10-4 RI units is possible with this system, comparable to the 5 times 10-4 RI unit resolution of conventional signal processing (software-based) approaches to processing the same data using a similar framework. This approach demonstrates experimentally the capability of the dip-based SPR probe in a portable footprint for detecting RI at resolution levels suitable for practical applications of these probes to field environments.

Published in:

Sensors Journal, IEEE  (Volume:7 ,  Issue: 10 )