Characterizing the impact of variability on circuit performance measurements (delay, power, and signal integrity) is necessary to avoid chip failure. The authors present a comprehensive methodology for analyzing the impact of device and metal variations on the power supply noise, and hence the signal integrity, of on-chip power grids.
Published in:
Design & Test of Computers, IEEE
(Volume:24
,
Issue:
3
)
Date of Publication: May-June 2007