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Low-Power, High-Performance Architecture of the PWRficient Processor Family

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1 Author(s)
Tse-Yu Yeh ; Univ. of Michigan, Ann Arbor

The dual-core PA6T-1682M system on chip (SoC) is the first design in the PWRficient family of high-performance, low-power processor designs that target server-class performance with low power consumption. the heart of the PA6T-1682M is the PA6T core, which implements the 64-bit IBM power architecture. The SoC implements extensive features that support embedded and mobile low-power applications.

Published in:

Micro, IEEE  (Volume:27 ,  Issue: 2 )