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A 3.5 mW Programmable High Speed Frequency Divider for a 2.4 GHz CMOS Frequency Synthesizer

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3 Author(s)
Arguello, A.M.G. ; Escola Politecnica, Univ. de Sao Paulo ; Navarro, J. ; Van Noije, W.

The implementation of a four bits programmable high speed frequency divider for a frequency synthesizer, using a 0.35 mum CMOS technology, is described. The programmable divider employs a divide-by-32/33 dual-modulus prescaler, two other counters, and the logic control necessary to operate the division. Additionally, a complete 2.4 GHz synthesizer was designed to test the divider; it includes a VCO, a phase frequency detector with charge pump, a low pass filter, buffers to increase the signal levels, and the programmable divider itself. Experimental results show that the programmable divider reached an operation frequency of 2.6 GHz with power consumption of 3.5 mW at 3.3 V power supply. The dimensions of the prescaler and the programmable divider are 77 mum times 33 mum and 198 mum times 33 mum, respectively

Published in:

Integrated Circuits and Systems Design, 18th Symposium on

Date of Conference:

4-7 Sept. 2005