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Static Power Consumption in Nano-CMOS Circuits: Physics and Modelling

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4 Author(s)
Kuzmicz, W. ; Warsaaw Univ. of Technol., Warsaw ; Piwowarska, E. ; Pfitzner, A. ; Kasprowicz, D.

Static power consumption due to excessive leakage currents is a major problem in CMOS digital ICs with gate lengths of 90 nm and below. In this paper the physics and modelling of these currents is discussed, with special emphasis on variability and its effect on the statistical spread of the static power consumption and total power consumption.

Published in:
Mixed Design of Integrated Circuits and Systems, 2007. MIXDES '07. 14th International Conference on

Date of Conference: 21-23 June 2007

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