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Integration and Packaging MEMS Directly Above Active CMOS

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3 Author(s)

Summary form only given. The majority of current MEMS products on the market still use a hybrid approach for the MEMS and the processing circuitry. The disadvantage of a hybrid approach is on the one hand the higher assembly and packaging cost and on the other hand the fact that the interconnections between the MEMS and the processing circuitry induce additional parasitic effects that may limit the system performance. Monolithic integration of MEMS and processing circuitry yields simpler assembly and packaging with minimum interconnection parasitics. IMEC believes that a "MEMS-last" or "post-CMOS MEMS" integration is a promising approach for monolithic integration as it enables integrating MEMS without introducing any changes in the standard CMOS fabrication process. This type of MEMS back-end-integration keeps a modular approach to a large extent: MEMS and IC can be first developed and optimized separately. It is only in a later stage of the development path, when a certain level of optimization is already reached, that MEMS are processed on top of the IC surface. In this way a new generation of circuitry can easily replace the older one without affecting the MEMS on top of it. However, post-processing MEMS limits the maximum fabrication temperature of the MEMS because of the risk of damaging the existing electronics or degrading its performance. In this paper we give an overview of different CMOS-MEMS integration options and then discuss in more detail the use of poly-SiGe as a post-CMOS MEMS integration technology. Using this technology, MEMS devices may be cost effectively processed and packaged directly on top of active CMOS yielding significantly miniaturized systems with increased sensitivity.

Published in:

High Density packaging and Microsystem Integration, 2007. HDP '07. International Symposium on

Date of Conference:

26-28 June 2007